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1. general description cbtl04dp211 is an (embedded) displayport multiplexer for displayport v1.1a switching and multiplexing applic ations on pc platforms. it is capable of 1 : 2 switching or 2 : 1 multiplexing of 2-lane displayport main li nk signals, using high-bandwidth pass-gate technology. also, it can switch/multiplex ho t plug detect (hpd) si gnal and aux signals, for a total of four channels on the display side. to facilitate displayport switching/multip lexing scheme on pc platforms suitably, cbtl04dp211 provides two separate selection pins (gpu_sel, aux_sel). the selection pin gpu_sel performs switching from one main link to another main link. hpd signals will also be switched using the same selection pi n. a separate select pin (aux_sel) provides additional selection be tween two aux channels such that the aux channel selection is independent of the main link and hpd signal selection. a typical application of cbtl04dp211 is on motherboards where one of two gpu/cpu display sources needs to be selected to connec t to a displayport sink device or connector. a controller chip selects which pa th to use by setting a select signal high or low. due to the non-directional nature of the signal paths (which use high-bandwidth pass-gate technology), the cbtl04dp211 can also be used in the reverse topology, e.g., to connect one displayport source device to one of tw o displayport sink devices or connectors. 2. features and benefits ? supports displayport v1.1a: 1.62 gbit/s, 2.7 gbit/s ? supports embedded displayport v1.2: 1.62 gbit/s, 2.7 gbit/s ? supports 1-lane, 2-lane main link operation ? 1 : 2 switching or 2 : 1 mu ltiplexing of displayport main link signals ? 2 high-speed differential channels with 2 : 1 multiplexing/switch ing for displayport main link signals ? 1 channel with 2 : 1 multiplexing/switching for aux signals ? 1 channel with 2 : 1 multiplexing/switching for single-ended hpd signals ? high-bandwidth analog pass-gate technology ? very low intra-pair differ ential skew (5 ps typical) ? very low inter-pair skew (< 180 ps) ? switch/multiplexer posit ion select cmos input ? single 3.3 v power supply ? very low operation current of 0.2 ma typical ? esd 8 kv hbm, 1 kv cdm ? esd 2 kv hbm, 500 v cdm for control pins ? available in 3 mm 6 mm, 0.4 mm pitch hvqfn32 package cbtl04dp211 displayport 2 : 1 multiplexer rev. 2 ? 13 april 2012 product data sheet
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 2 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 3. applications ? motherboard applications requiring (embedded) displayport switching/multiplexing ? docking stations ? notebook computers ? chip sets requiring flexible allocation of displayport i/o pins to board connectors 4. ordering information [1] industrial temperature range. [2] total height after printed-circ uit board mounting = 1 mm (maximum). table 1. ordering information type number topside mark package name description version CBTL04DP211BS [1] l04dp211 hvqfn32 plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 3 6 0.85 mm [2] sot1185-1
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 3 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 5. functional diagram fig 1. functional diagram in1_0+ out_0- aux+ aux- out_0+ in1_0- 002aag018 in2_0+ in2_0- hpd_1 hpd_2 hpd_in 2 : 1 mux in1_1+ out_1- out_1+ in1_1- in2_1+ in2_1- 2 : 1 mux aux1+ aux1- aux2+ aux2- 2 : 1 mux aux_sel gpu_sel 2 : 1 mux
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 4 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin configuration for hvqfn32 002aag019 transparent top view in1_1+ 27 28 gnd 1 out_0+ in1_1- 26 2 out_0- in2_0+ 25 3v dd in2_0- 24 4 out_1+ in2_1+ 23 5 out_1- in2_1- 22 6aux+ gnd 21 7aux- v dd 20 8 hpd_in aux1+ 19 9v dd aux1- 18 10 gpu_sel hpd_1 17 11 n.c. 16 v dd 29 v dd 15 aux2+ 30 in1_0- 14 aux2- 31 in1_0+ 13 hpd_2 32 aux_sel 12 v dd CBTL04DP211BS table 2. pin description symbol pin type description gpu_sel 10 3.3 v cmos single-ended input selection for main link and hot plug detect signals between two mult iplexer/switch paths. when high, path 2 is connected to its corresponding i/o. when low, path 1 is connected to its corresponding i/o. aux_sel 32 3.3 v cmos single-ended input selects between aux paths. when high, aux2 (path 2) input is connected to aux output. when low, aux1 (path 1) input is connected to aux output. in1_0+ 31 differential i/o two bidirectional high-speed differential pairs for displayport main link signals, path 1. in1_0 ? 30 differential i/o in1_1+ 27 differential i/o in1_1 ? 26 differential i/o in2_0+ 25 differential i/o two bidirectional high-speed differential pairs for displayport main link signals, path 2. in2_0 ? 24 differential i/o in2_1+ 23 differential i/o in2_1 ? 22 differential i/o
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 5 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer [1] hvqfn32 package die supply ground is connected to both gnd pins and exposed c enter pad. gnd pins and the exposed center pad must be connected to supply ground for proper device operation. for enhanced thermal, electrical, and board level performanc e, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region. out_0+ 1 differential i/o two bidirectional high-speed differential pairs for displayport main link signals. out_0 ? 2 differential i/o out_1+ 4 differential i/o out_1 ? 5 differential i/o aux1+ 19 differential i/o high-speed di fferential pair for aux signals, path 1. aux1 ? 18 differential i/o aux2+ 15 differential i/o high-speed di fferential pair for aux signals, path 2. aux2 ? 14 differential i/o aux+ 6 differential i/o high-speed differential pair for aux signals. aux ? 7 differential i/o hpd_1 17 single-ended i/o single-ended channel for the hpd signal, path 1. hpd_2 13 single-ended i/o single-ended channel for the hpd signal, path 2. hpd_in 8 single-ended i/o single-ended channel for the hpd signal. v dd 3, 9, 12, 16, 20, 29 power supply 3.3 v power supply. gnd [1] 21, 28, center pad ground ground. n.c. 11 - not connected. this pin is not connected to any signal internally. table 2. pin description ?continued symbol pin type description
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 6 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 7. functional description refer to figure 1 ? functional diagram ? . the cbtl04dp211 uses a 3.3 v power supply. all main link signal paths are implemented using high-bandwidth pass-gate technology and are non-directional. no clock or reset signal is needed for the multiplexer to function. the switch position for the main link differential channels and hot plug detect signals is selected using the select signal gpu_sel. additionally, the signal aux_sel selects between two aux positions. the detailed operation is described in section 7.1 ? multiplexer/switch select functions ? . 7.1 multiplexer/switc h select functions the internal multiplexer swit ch position is controlled by two logic inputs gpu_sel and aux_sel as described below. table 3. multiplexer/switch select control for in and out channels gpu_sel in1_n in2_n 0 active; connected to out_n high-impedance 1 high-impedance active; connected to out_n table 4. multiplexer/switch sele ct control for hpd channel gpu_sel hpd_1 hpd_2 0 active; connected to hpd_in high-impedance 1 high-impedance active; connected to hpd_in table 5. multiplexer/switch select control for aux channels aux_sel aux1 aux2 0 active; connected to aux high-impedance 1 high-impedance active; connected to aux
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 7 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 8. limiting values [1] human body model: ansi/eos/esd-s5.1-1994, standard for esd sensitivity testing, human body model - component level; electrostatic disc harge association, rome, ny, usa. [2] charged device model: ansi/eos/esd-s5.3-1-1999, stand ard for esd sensitivity testing, charged device model - component level; electrostatic discharge association, rome, ny, usa. 9. recommended operating conditions [1] hpd input is tolerant to 5 v input, provided a 1 k series resistor between the voltage source and the pin is placed in series. see section 11.1 ? special considerations ? . [2] aux input is tolerant to 5 v input, provided a 2.2 k series resistor between the voltage source and the pin is placed in series. see section 11.1 ? special considerations ? . table 6. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage ? 0.3 +5 v t case case temperature ? 40 +85 c v esd electrostatic discharge voltage hbm [1] - 8000 v hbm; cmos inputs [1] - 2000 v cdm [2] - 1000 v cdm; cmos inputs [2] 500 v table 7. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage 3.0 3.3 3.6 v v i input voltage cmos inputs ? 0.3 - v dd +0.3 v main link ? 0.3 - v dd +0.3 v hpd inputs [1] ? 0.3 - v dd +0.3 v aux [2] ? 0.3 - v dd +0.3 v t amb ambient temperature oper ating in free air ? 40 - +85 c
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 8 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 10. characteristics 10.1 general characteristics 10.2 displayport main link channel characteristics table 8. general characteristics symbol parameter conditions min typ max unit i dd supply current v dd =3.3v - 200 500 a p cons power consumption v dd =3.3v --4mw t startup start-up time supply voltage valid to channel specified operating characteristics --10 s t rcfg reconfiguration time gpu_sel or aux_sel state change to channel specified operating characteristics --1 s table 9. displayport main link channel characteristics symbol parameter conditions min typ max unit v i input voltage ? 0.3 - +3.3 v v ic common-mode input voltage 0 - 2.0 v v id differential input voltage peak-to-peak - - +1.2 v ddil differential insertion loss channel is on; f = 100 mhz - ? 1.6 - db channel is on; f = 1.5 ghz - ? 2.7 - db channel is off; 0 hz f 1.5 ghz - ? 35 - db ddrl differential return loss channel is on; 0 hz f 1.5 ghz - ? 10 - db ddnext differential near-end crosstalk adjacent channels are on; 0hz f 1.5 ghz - ? 40 - db b bandwidth ? 3.0 db intercept - 2.0 - ghz t pd propagation delay from inx_n+/inx_n ? port to out_n+/out_n ? port or vice versa -100-ps t sk(dif) differential skew time intra-pair - 5 - ps t sk skew time inter-pair - - 180 ps
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 9 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 10.3 aux ports [1] time from aux input changing state to aux outpu t changing state. includes aux rise/fall time. 10.4 hpd_in input, hpd_x outputs [1] time from hpd_in changing state to hpd_ x changing state. includes hpd rise/fall time. 10.5 gpu_sel and aux_sel inputs table 10. aux port characteristics symbol parameter conditions min typ max unit v i input voltage ? 0.3 - v dd +0.3 v v o output voltage 50 load - - v dd +0.3 v v bias bias voltage aux 0 - v dd v r on on-state resistance v bias 2.0 v - 15 - 2.0 v < v bias cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 10 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 11. application information 11.1 special considerations certain cable or dongle misplug scenarios make it possible for a 5 v input condition to occur on pins aux+ and aux ? , as well as hpd_in. when aux+ and aux ? are connected through a minimum of 2.2 k each, the cbtl04dp211 will sink current but will not be damaged. similarly, hpd_in may be connected to 5 v via at least a 1 k resistor. (correct functional operation to specificati on is not expected in these scenarios.) the latter also prevents the hpd_out output fr om loading down the system hpd signal when power to the cbtl04dp211 is off. fig 3. application diagram out_0- aux+ aux- out_0+ 002aag022 hpd_in 2 : 1 mux out_1- out_1+ 2 : 1 mux 2 : 1 mux aux_sel gpu_sel 2 : 1 mux cbtl04dp211 v dd gnd 100 k 100 k connector d0a+ d0a- d1a+ d1a- auxa+ auxa- hpda gpu a d0b+ d0b- d1b+ d1b- auxb+ auxb- hpdb gpu b
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 11 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 12. package outline fig 4. package outline sot1185-1 (hvqfn32) references outline version european projection issue date iec jedec jeita sot1185-1 - - - - - - - - - sot1185-1_po 10-07-26 10-08-09 unit mm max nom min 1.00 0.85 0.80 0.05 0.02 0.00 0.2 3.1 3.0 2.9 1.9 1.8 1.7 6.1 6.0 5.9 0.4 1.6 0.4 0.3 0.2 0.1 a (1) dimensions note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. hvqfn32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; 3 x 6 x 0.85 mm sot1185-1 a 1 b 0.25 0.20 0.15 cd (1) d h e (1) e h 4.9 4.8 4.7 ee 1 e 2 4 lv 0.07 w 0.05 y 0.08 y 1 0 2.5 5 mm scale terminal 1 index area b a d e c y c y 1 x detail x a c a 1 1 11 e h d h l b e 2 e 1 e e ac b v c w terminal 1 index area 17 27 12 32 16 28
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 12 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 13. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 13.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 13.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 13 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 13.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 5 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 1 3 and 14 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 5 . table 13. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 < 2.5 235 220 2.5 220 220 table 14. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 14 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 14. abbreviations msl: moisture sensitivity level fig 5. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 15. abbreviations acronym description aux auxiliary channel (in displayport definition) cdm charged-device model cmos complementary metal-oxide semiconductor cpu central processing unit esd electrostatic discharge gpu graphics processor unit hbm human body model hpd hot plug detect i/o input/output pc personal computer
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 15 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 15. revision history table 16. revision history document id release date data sheet status change notice supersedes cbtl04dp211 v.2 20120413 product data sheet - cbtl04dp211 v.1 modifications: ? table 1 ? ordering information ? : ? added ?topside mark? column (line a marking is corrected from ?04dp211? to ?l04dp211?) ? added (new) table note [1] ? deleted (old) section 5 ?marking? cbtl04dp211 v.1 20110330 product data sheet - -
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 16 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
cbtl04dp211 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 2 ? 13 april 2012 17 of 18 nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors cbtl04dp211 displayport 2 : 1 multiplexer ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 13 april 2012 document identifier: cbtl04dp211 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 6 7.1 multiplexer/switch select fu nctions . . . . . . . . . . 6 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 recommended operating conditions. . . . . . . . 7 10 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8 10.1 general characteristics . . . . . . . . . . . . . . . . . . . 8 10.2 displayport main link channel characteristics . 8 10.3 aux ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 10.4 hpd_in input, hpd_x outputs . . . . . . . . . . . . . 9 10.5 gpu_sel and aux_sel inputs . . . . . . . . . . . 9 11 application information. . . . . . . . . . . . . . . . . . 10 11.1 special considerations . . . . . . . . . . . . . . . . . . 10 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 soldering of smd packages . . . . . . . . . . . . . . 12 13.1 introduction to soldering . . . . . . . . . . . . . . . . . 12 13.2 wave and reflow soldering . . . . . . . . . . . . . . . 12 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 12 13.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 13 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 16 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 contact information. . . . . . . . . . . . . . . . . . . . . 17 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

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